diff --git a/src/run.rs b/src/run.rs
index 774b1c8..9186619 100644
--- a/src/run.rs
+++ b/src/run.rs
@@ -38,7 +38,7 @@ macro_rules! assert_ok {
 impl Processor {
     fn run(&mut self, instruction: &RunnableInstruction) {
         match instruction.instruction {
-            Instruction::LDnnn { value, register } => {
+            Instruction::LD8BitImmediateToRegister { value, register } => {
                 self.registers.set_single_register(register, value);
             }
 
diff --git a/src/run/instructions.rs b/src/run/instructions.rs
index af6d47a..2cf987f 100644
--- a/src/run/instructions.rs
+++ b/src/run/instructions.rs
@@ -5,7 +5,7 @@ use super::register;
 // http://marc.rawer.de/Gameboy/Docs/GBCPUman.pdf
 pub enum Instruction {
     // 3.3.1.1
-    LDnnn {
+    LD8BitImmediateToRegister {
         value: u8,
         register: register::Single,
     },
diff --git a/src/run/parse/load8/immediate.rs b/src/run/parse/load8/immediate.rs
index 0db25d8..ff6822a 100644
--- a/src/run/parse/load8/immediate.rs
+++ b/src/run/parse/load8/immediate.rs
@@ -15,26 +15,26 @@ impl OpcodeParser for Immediate8BitLoadParser {
         let opcode = parse::get_opcode_from_data(data)?;
 
         match opcode {
-            0x3E => make_ldnn_data(register::Single::A, data),
-            0x06 => make_ldnn_data(register::Single::B, data),
-            0x0E => make_ldnn_data(register::Single::C, data),
-            0x16 => make_ldnn_data(register::Single::D, data),
-            0x1E => make_ldnn_data(register::Single::E, data),
-            0x26 => make_ldnn_data(register::Single::H, data),
-            0x2E => make_ldnn_data(register::Single::L, data),
+            0x3E => make_load_immediate_data(register::Single::A, data),
+            0x06 => make_load_immediate_data(register::Single::B, data),
+            0x0E => make_load_immediate_data(register::Single::C, data),
+            0x16 => make_load_immediate_data(register::Single::D, data),
+            0x1E => make_load_immediate_data(register::Single::E, data),
+            0x26 => make_load_immediate_data(register::Single::H, data),
+            0x2E => make_load_immediate_data(register::Single::L, data),
 
             _ => Err(Error::UnknownOpcode(opcode)),
         }
     }
 }
 
-fn make_ldnn_data(register: register::Single, data: &[u8]) -> ParseResult {
+fn make_load_immediate_data(register: register::Single, data: &[u8]) -> ParseResult {
     let opcode = parse::get_opcode_from_data(data)?;
     let value = data.get(1).ok_or(Error::NotEnoughArgs(opcode))?;
 
     Ok((
         RunnableInstruction {
-            instruction: Instruction::LDnnn {
+            instruction: Instruction::LD8BitImmediateToRegister {
                 register,
                 value: *value,
             },