diff --git a/src/cpu/instructions/misc.rs b/src/cpu/instructions/misc.rs index 087eddc..488548b 100644 --- a/src/cpu/instructions/misc.rs +++ b/src/cpu/instructions/misc.rs @@ -7,4 +7,5 @@ pub enum MiscInstruction { ComplementCarryFlag, ComplementARegister, DecimalAdjustAccumulator, + Nop, } diff --git a/src/cpu/parse/misc.rs b/src/cpu/parse/misc.rs index 18f1dba..13b5e7b 100644 --- a/src/cpu/parse/misc.rs +++ b/src/cpu/parse/misc.rs @@ -14,6 +14,7 @@ impl OpcodeParser for Parser { 0x3F => Ok(build_complement_carry_flag_data()), 0x27 => Ok(build_daa_data()), 0x2F => Ok(build_complement_a_register_data()), + 0x00 => Ok(build_nop_data()), _ => Err(super::Error::UnknownOpcode(opcode)), } } @@ -37,3 +38,10 @@ fn build_daa_data() -> ParseOutput { 1, ) } + +fn build_nop_data() -> ParseOutput { + ( + Instruction::Misc(MiscInstruction::Nop), + 1, + ) +} diff --git a/src/cpu/run/misc.rs b/src/cpu/run/misc.rs index 4975bf0..4e72cf3 100644 --- a/src/cpu/run/misc.rs +++ b/src/cpu/run/misc.rs @@ -8,11 +8,16 @@ use super::{Cycles, Run}; impl Run for MiscInstruction { fn run_on(&self, processor: &mut Processor) -> Result { match *self { + MiscInstruction::Nop => { + Ok(Cycles(4)) + } + MiscInstruction::SetCarryFlag => { set_flags_in_carry_bit_instruction(processor, 1); Ok(Cycles(4)) } + MiscInstruction::ComplementCarryFlag => { let current_carry_flag = processor.registers.get_flag_bit(register::Flag::Carry); let flipped = (current_carry_flag == 0).into(); @@ -21,6 +26,7 @@ impl Run for MiscInstruction { Ok(Cycles(4)) } + MiscInstruction::ComplementARegister => { let current_value = processor .registers @@ -38,6 +44,7 @@ impl Run for MiscInstruction { Ok(Cycles(4)) } + MiscInstruction::DecimalAdjustAccumulator => { let (adjusted_a_value, carry) = get_daa_value(&processor.registers); diff --git a/tests/cpu/jsmoo/testdata/disabled/00.json b/tests/cpu/jsmoo/testdata/00.json similarity index 100% rename from tests/cpu/jsmoo/testdata/disabled/00.json rename to tests/cpu/jsmoo/testdata/00.json diff --git a/tests/cpu/misc.rs b/tests/cpu/misc.rs index 7c86530..742c398 100644 --- a/tests/cpu/misc.rs +++ b/tests/cpu/misc.rs @@ -157,3 +157,17 @@ fn test_daa( (register::Flag::Zero, u8::from(expected_flags.zero)) ); } + +#[test] +fn test_nop_executes_successfully() { + let mut processor = Processor::default(); + let data = [0x00, 0x06]; + + let (ins, extra_data) = Instruction::from_data(&data).expect("could not parse instruction"); + + assert_eq!(extra_data, &[0x06]); + processor.run_instruction(ins); + + // uhhh it does nothing + assert_eq!(processor.num_cycles, 4); +}