From 70db1fe62a9d894caf97bc86c670496f999baa8d Mon Sep 17 00:00:00 2001 From: Nick Krichevsky Date: Sat, 23 Apr 2022 23:57:48 -0400 Subject: [PATCH] Reduce repetition in flags tests --- src/cpu.rs | 175 ++++++++++++++++++++--------------------------------- 1 file changed, 65 insertions(+), 110 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index 1fc2847..323fb71 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -121,6 +121,50 @@ mod tests { use super::*; use test_case::test_case; + fn set_opposite_of_expected_flags( + processor: &mut Processor, + (zero_flag, sub_flag, half_carry_flag, carry_flag): (u8, u8, u8, u8), + ) { + let invert_flag = |value| { + if value == 0 { + 1 + } else if value == 1 { + 0 + } else { + panic!("invalid flag value of {value} ") + } + }; + + processor + .registers + .set_flag_bit(register::Flag::Zero, invert_flag(zero_flag)); + + processor + .registers + .set_flag_bit(register::Flag::HalfCarry, invert_flag(half_carry_flag)); + + processor + .registers + .set_flag_bit(register::Flag::Carry, invert_flag(carry_flag)); + + processor + .registers + .set_flag_bit(register::Flag::Subtract, invert_flag(sub_flag)); + } + + macro_rules! assert_flags_eq { + ($processor: expr, $(($flag: path, $value: expr)),+ $(,)?) => { + $( + assert_eq!( + $value, + $processor.registers.get_flag_bit($flag), + "{:?} flag had unexpected value", + $flag + ); + )+ + }; + } + #[test_case(0x3E, register::SingleEightBit::A)] #[test_case(0x06, register::SingleEightBit::B)] #[test_case(0x0E, register::SingleEightBit::C)] @@ -661,8 +705,6 @@ mod tests { assert_eq!(20, processor.registers.a); } - // TODO: These add tests are almost entirely copy paste - we should find some way to break them up - #[test_case(0x80, register::SingleEightBit::B)] #[test_case(0x81, register::SingleEightBit::C)] #[test_case(0x82, register::SingleEightBit::D)] @@ -703,20 +745,7 @@ mod tests { processor.registers.a = a_value; // Set all the register to the opposite we expect to ensure they all get set - processor - .registers - .set_flag_bit(register::Flag::Zero, if zero_flag == 1 { 0 } else { 1 }); - - processor.registers.set_flag_bit( - register::Flag::HalfCarry, - if half_carry_flag == 1 { 0 } else { 1 }, - ); - processor - .registers - .set_flag_bit(register::Flag::Carry, if carry_flag == 1 { 0 } else { 1 }); - processor - .registers - .set_flag_bit(register::Flag::Subtract, 1); + set_opposite_of_expected_flags(&mut processor, (zero_flag, 0, half_carry_flag, carry_flag)); processor.registers.set_single_8bit_register(src, src_value); let data = [opcode, 0x02]; @@ -727,28 +756,12 @@ mod tests { processor.run(&ins); - assert_eq!( - zero_flag, - processor.registers.get_flag_bit(register::Flag::Zero), - "zero flag did not match", - ); - - assert_eq!( - 0, - processor.registers.get_flag_bit(register::Flag::Subtract), - "sub flag did not match", - ); - - assert_eq!( - half_carry_flag, - processor.registers.get_flag_bit(register::Flag::HalfCarry), - "half carry flag did not match" - ); - - assert_eq!( - carry_flag, - processor.registers.get_flag_bit(register::Flag::Carry), - "carry flag did not match" + assert_flags_eq!( + processor, + (register::Flag::Zero, zero_flag), + (register::Flag::Subtract, 0), + (register::Flag::HalfCarry, half_carry_flag), + (register::Flag::Carry, carry_flag), ); } @@ -801,20 +814,7 @@ mod tests { .expect("expected to set address 0xFF00 but could not"); // Set all the register to the opposite we expect to ensure they all get set - processor - .registers - .set_flag_bit(register::Flag::Zero, if zero_flag == 1 { 0 } else { 1 }); - - processor.registers.set_flag_bit( - register::Flag::HalfCarry, - if half_carry_flag == 1 { 0 } else { 1 }, - ); - processor - .registers - .set_flag_bit(register::Flag::Carry, if carry_flag == 1 { 0 } else { 1 }); - processor - .registers - .set_flag_bit(register::Flag::Subtract, 1); + set_opposite_of_expected_flags(&mut processor, (zero_flag, 0, half_carry_flag, carry_flag)); let data = [0x86, 0x01]; let (ins, extra_data) = @@ -823,28 +823,12 @@ mod tests { processor.run(&ins); - assert_eq!( - zero_flag, - processor.registers.get_flag_bit(register::Flag::Zero), - "zero flag did not match", - ); - - assert_eq!( - 0, - processor.registers.get_flag_bit(register::Flag::Subtract), - "sub flag did not match", - ); - - assert_eq!( - half_carry_flag, - processor.registers.get_flag_bit(register::Flag::HalfCarry), - "half carry flag did not match" - ); - - assert_eq!( - carry_flag, - processor.registers.get_flag_bit(register::Flag::Carry), - "carry flag did not match" + assert_flags_eq!( + processor, + (register::Flag::Zero, zero_flag), + (register::Flag::Subtract, 0), + (register::Flag::HalfCarry, half_carry_flag), + (register::Flag::Carry, carry_flag), ); } @@ -879,20 +863,7 @@ mod tests { processor.registers.a = a_value; // Set all the register to the opposite we expect to ensure they all get set - processor - .registers - .set_flag_bit(register::Flag::Zero, if zero_flag == 1 { 0 } else { 1 }); - - processor.registers.set_flag_bit( - register::Flag::HalfCarry, - if half_carry_flag == 1 { 0 } else { 1 }, - ); - processor - .registers - .set_flag_bit(register::Flag::Carry, if carry_flag == 1 { 0 } else { 1 }); - processor - .registers - .set_flag_bit(register::Flag::Subtract, 1); + set_opposite_of_expected_flags(&mut processor, (zero_flag, 0, half_carry_flag, carry_flag)); let data = [0xC6, n, 0x01]; let (ins, extra_data) = @@ -901,28 +872,12 @@ mod tests { processor.run(&ins); - assert_eq!( - zero_flag, - processor.registers.get_flag_bit(register::Flag::Zero), - "zero flag did not match", - ); - - assert_eq!( - 0, - processor.registers.get_flag_bit(register::Flag::Subtract), - "sub flag did not match", - ); - - assert_eq!( - half_carry_flag, - processor.registers.get_flag_bit(register::Flag::HalfCarry), - "half carry flag did not match" - ); - - assert_eq!( - carry_flag, - processor.registers.get_flag_bit(register::Flag::Carry), - "carry flag did not match" + assert_flags_eq!( + processor, + (register::Flag::Zero, zero_flag), + (register::Flag::Subtract, 0), + (register::Flag::HalfCarry, half_carry_flag), + (register::Flag::Carry, carry_flag), ); } }