Add ability to load from i/o registers relative to immediate
parent
75235ad5e0
commit
e2365aec7e
40
src/run.rs
40
src/run.rs
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@ -107,6 +107,16 @@ impl Processor {
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self.registers.set_combined_register(dst, dst_address + 1);
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}
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Instruction::LDToMemoryRelativeToIORegisterStartByImmediate { src, offset } => {
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let dst_address = memory::IO_REGISTER_START_ADDRESS + usize::from(offset);
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let load_res = self.load_from_register_to_address(dst_address, src);
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assert_ok!(load_res);
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}
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Instruction::LDFromMemoryRelativeToIORegisterStartByImmediate { dst, offset } => {
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let src_address = memory::IO_REGISTER_START_ADDRESS + usize::from(offset);
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let load_res = self.load_from_address_to_register(dst, src_address);
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assert_ok!(load_res);
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}
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}
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self.num_cycles += u64::from(instruction.cycles);
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@ -464,4 +474,34 @@ mod tests {
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.get_combined_register(register::Combined::HL)
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);
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}
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#[test]
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fn test_load_to_io_register_zone_by_immediate() {
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let mut processor = Processor::default();
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processor.registers.a = 0xAF;
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let data = [0xE0, 0x05, 0x06];
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let (ins, extra_data) =
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RunnableInstruction::from_data(&data).expect("could not parse instruction");
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assert_eq!(extra_data, &[0x06]);
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processor.run(&ins);
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assert_eq!(Some(0xAF), processor.memory.get(0xFF05));
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}
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#[test]
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fn test_load_from_io_register_zone_by_immediate() {
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let mut processor = Processor::default();
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processor.memory.set(0xFF05, 0xAF);
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let data = [0xF0, 0x05, 0x06];
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let (ins, extra_data) =
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RunnableInstruction::from_data(&data).expect("could not parse instruction");
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assert_eq!(extra_data, &[0x06]);
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processor.run(&ins);
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assert_eq!(0xAF, processor.registers.a);
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}
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}
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@ -34,6 +34,16 @@ pub enum Instruction {
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// A register whose value will be used to get the address relative to FF00
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offset_register: register::Single,
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},
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// 3.3.1.20
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LDFromMemoryRelativeToIORegisterStartByImmediate {
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dst: register::Single,
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offset: u8,
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},
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// 3.3.1.19
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LDToMemoryRelativeToIORegisterStartByImmediate {
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offset: u8,
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src: register::Single,
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},
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LDFromImmediateAddress {
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src_address: u16,
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dst: register::Single,
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@ -68,6 +68,13 @@ fn parse_load_from_address_to_register(data: &[u8]) -> ParseResult {
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register::Single::A,
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data,
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),
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0xF0 => make_ld_from_memory_relative_to_io_register_start_by_immediate(
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register::Single::A,
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data,
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),
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0xE0 => {
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make_ld_to_memory_relative_to_io_register_start_by_immediate(register::Single::A, data)
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}
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_ => Err(Error::UnknownOpcode(opcode)),
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}
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@ -227,6 +234,46 @@ fn make_ld_to_memory_relative_to_io_register_start(
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.ok_or(Error::NoData)
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}
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fn make_ld_to_memory_relative_to_io_register_start_by_immediate(
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src: register::Single,
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data: &[u8],
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) -> ParseResult {
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let opcode = parse::get_opcode_from_data(data)?;
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let value = data.get(1).ok_or(Error::NotEnoughArgs(opcode))?;
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Ok((
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RunnableInstruction {
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instruction: Instruction::LDToMemoryRelativeToIORegisterStartByImmediate {
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src,
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offset: *value,
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},
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// guaranteed to succeed given we got the value
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cycles: 12,
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},
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&data[2..],
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))
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}
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fn make_ld_from_memory_relative_to_io_register_start_by_immediate(
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dst: register::Single,
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data: &[u8],
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) -> ParseResult {
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let opcode = parse::get_opcode_from_data(data)?;
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let value = data.get(1).ok_or(Error::NotEnoughArgs(opcode))?;
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Ok((
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RunnableInstruction {
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instruction: Instruction::LDFromMemoryRelativeToIORegisterStartByImmediate {
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offset: *value,
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dst,
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},
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cycles: 12,
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},
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// guaranteed to succeed given we got the value
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&data[2..],
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))
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}
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fn make_ld_to_address_then_do_arithmetic<
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F: Fn(register::Combined, register::Single) -> Instruction,
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>(
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