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Fix bug where the zero flag wouldn't be set if the carry flag was set 

I have no idea why I thought this was correct
jsmoo
Nick Krichevsky 2023-04-21 12:25:15 -04:00
parent e369140dd1
commit e416e607df
2 changed files with 37 additions and 33 deletions
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8
src/cpu/run/arith8.rs
View File

@ -102,11 +102,9 @@ impl InstructionRunner<EightBitArithmeticInstruction> for EightBitArithmeticRunn
}
fn set_addition_flags(processor: &mut Processor, total: u8, half_carry: bool, carry: bool) {
processor.registers.set_flag_bit(
register::Flag::Zero,
// carry must be false, as if it's true, the value is indeed > 0
(total == 0 && !carry).into(),
);
processor
.registers
.set_flag_bit(register::Flag::Zero, (total == 0).into());
processor
.registers

62
tests/cpu/arith8.rs
View File

@ -49,20 +49,18 @@ fn test_add_to_a_value(opcode: u8, src: register::SingleEightBit) {
assert_eq!(30, processor.registers.a);
}
#[test_case(0x80, register::SingleEightBit::B, 0x00, 0x00, 1, 0, 0; "zero flag for zero value")]
#[test_case(0x80, register::SingleEightBit::B, 0x00, 0x01, 0, 0, 0; "no zero flag for non-zero value")]
#[test_case(0x81, register::SingleEightBit::C, 0x0F, 0x01, 0, 1, 0; "half carry flag")]
#[test_case(0x81, register::SingleEightBit::C, 0x80, 0x80, 0, 0, 1; "full carry flag")]
#[test_case(0x81, register::SingleEightBit::C, 0xFF, 0x01, 0, 1, 1; "both full and half carry flag")]
#[test_case(0x80, register::SingleEightBit::B, 0x00, 0x00, AdditionOperationFlags{zero: 1, half_carry: 0, carry: 0}; "zero flag for zero value")]
#[test_case(0x80, register::SingleEightBit::B, 0x00, 0x01, AdditionOperationFlags{zero: 0, half_carry: 0, carry: 0}; "no zero flag for non-zero value")]
#[test_case(0x81, register::SingleEightBit::C, 0x0F, 0x01, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 0}; "half carry flag")]
#[test_case(0x81, register::SingleEightBit::C, 0x80, 0x80, AdditionOperationFlags{zero: 1, half_carry: 0, carry: 1}; "full carry flag")]
#[test_case(0x81, register::SingleEightBit::C, 0xFF, 0x01, AdditionOperationFlags{zero: 1, half_carry: 1, carry: 1}; "all flags")]
// 0000 1111
fn test_add_register_to_a_flags(
opcode: u8,
src: register::SingleEightBit,
a_value: u8,
src_value: u8,
zero_flag: u8,
half_carry_flag: u8,
carry_flag: u8,
expected_flags: AdditionOperationFlags,
) {
let mut processor = Processor::default();
processor.registers.a = a_value;
@ -70,7 +68,12 @@ fn test_add_register_to_a_flags(
// Set all the register to the opposite we expect to ensure they all get set
testutil::set_opposite_of_expected_flags(
&mut processor,
(zero_flag, 0, half_carry_flag, carry_flag),
(
expected_flags.zero,
0,
expected_flags.half_carry,
expected_flags.carry,
),
);
processor.registers.set_single_8bit_register(src, src_value);
@ -84,10 +87,10 @@ fn test_add_register_to_a_flags(
testutil::assert_flags_eq!(
processor,
(register::Flag::Zero, zero_flag),
(register::Flag::Zero, expected_flags.zero),
(register::Flag::Subtract, 0),
(register::Flag::HalfCarry, half_carry_flag),
(register::Flag::Carry, carry_flag),
(register::Flag::HalfCarry, expected_flags.half_carry),
(register::Flag::Carry, expected_flags.carry),
);
}
@ -115,17 +118,15 @@ fn test_add_hl_addr_to_a_value() {
assert_eq!(0x46, processor.registers.a);
}
#[test_case(0x00, 0x00, 1, 0, 0; "zero flag for zero value")]
#[test_case(0x00, 0x01, 0, 0, 0; "no zero flag for non-zero value")]
#[test_case(0x0F, 0x01, 0, 1, 0; "half carry flag")]
#[test_case(0x80, 0x80, 0, 0, 1; "full carry flag")]
#[test_case(0xFF, 0x01, 0, 1, 1; "both full and half carry flag")]
#[test_case(0x00, 0x00, AdditionOperationFlags{zero: 1, half_carry: 0, carry: 0}; "zero flag for zero value")]
#[test_case(0x00, 0x01, AdditionOperationFlags{zero: 0, half_carry: 0, carry: 0}; "no zero flag for non-zero value")]
#[test_case(0x0F, 0x01, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 0}; "half carry flag")]
#[test_case(0x80, 0x80, AdditionOperationFlags{zero: 1, half_carry: 0, carry: 1}; "full carry flag")]
#[test_case(0xFF, 0x01, AdditionOperationFlags{zero: 1, half_carry: 1, carry: 1}; "all flags")]
fn test_add_hl_addr_to_a_flags(
a_value: u8,
hl_addr_value: u8,
zero_flag: u8,
half_carry_flag: u8,
carry_flag: u8,
expected_flags: AdditionOperationFlags,
) {
let mut processor = Processor::default();
processor.registers.a = a_value;
@ -142,7 +143,12 @@ fn test_add_hl_addr_to_a_flags(
// Set all the register to the opposite we expect to ensure they all get set
testutil::set_opposite_of_expected_flags(
&mut processor,
(zero_flag, 0, half_carry_flag, carry_flag),
(
expected_flags.zero,
0,
expected_flags.half_carry,
expected_flags.carry,
),
);
let data = [0x86, 0x01];
@ -154,10 +160,10 @@ fn test_add_hl_addr_to_a_flags(
testutil::assert_flags_eq!(
processor,
(register::Flag::Zero, zero_flag),
(register::Flag::Zero, expected_flags.zero),
(register::Flag::Subtract, 0),
(register::Flag::HalfCarry, half_carry_flag),
(register::Flag::Carry, carry_flag),
(register::Flag::HalfCarry, expected_flags.half_carry),
(register::Flag::Carry, expected_flags.carry),
);
}
@ -179,8 +185,8 @@ fn test_add_immediate_to_a_value() {
#[test_case(0x00, 0x00, AdditionOperationFlags{zero: 1, half_carry: 0, carry: 0}; "zero flag for zero value")]
#[test_case(0x00, 0x01, AdditionOperationFlags{zero: 0, half_carry: 0, carry: 0}; "no zero flag for non-zero value")]
#[test_case(0x0F, 0x01, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 0}; "half carry flag")]
#[test_case(0x80, 0x80, AdditionOperationFlags{zero: 0, half_carry: 0, carry: 1}; "full carry flag")]
#[test_case(0xFF, 0x01, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 1}; "both full and half carry flag")]
#[test_case(0x80, 0x80, AdditionOperationFlags{zero: 1, half_carry: 0, carry: 1}; "full carry flag")]
#[test_case(0xFF, 0x01, AdditionOperationFlags{zero: 1, half_carry: 1, carry: 1}; "all flags")]
fn test_add_immediate_to_a_flags(a_value: u8, n: u8, expected_flags: AdditionOperationFlags) {
let mut processor = Processor::default();
processor.registers.a = a_value;
@ -224,7 +230,7 @@ fn test_add_immediate_to_a_flags(a_value: u8, n: u8, expected_flags: AdditionOpe
#[test_case(0x8C, 0x12, 1, register::SingleEightBit::H, 0x5, 0x18; "carry to register h")]
#[test_case(0x8D, 0x12, 0, register::SingleEightBit::L, 0x5, 0x17; "no carry to register l")]
#[test_case(0x8D, 0x12, 1, register::SingleEightBit::L, 0x5, 0x18; "carry to register l")]
fn test_add_with_carry_to_a_value(
fn test_add_register_with_carry_to_a_value(
opcode: u8,
initial_value: u8,
carry_bit: u8,
@ -311,7 +317,7 @@ fn test_add_with_carry_to_a_value(
#[test_case(0x8D, 0x0F, 0, register::SingleEightBit::L, 0x0F, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 0}; "no carry bit, full carry, register l")]
#[test_case(0x8D, 0x0F, 1, register::SingleEightBit::L, 0x0F, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 0}; "carry bit, full carry, register l")]
#[test_case(0x8D, 0xFF, 1, register::SingleEightBit::L, 0xFF, AdditionOperationFlags{zero: 0, half_carry: 1, carry: 1}; "carry bit, both carries, register l")]
fn test_add_with_carry_to_a_flags(
fn test_add_register_with_carry_to_a_flags(
opcode: u8,
initial_value: u8,
carry_bit: u8,