Implement loading to the stack pointer
parent
d85c7b8a98
commit
034811c54e
20
src/run.rs
20
src/run.rs
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@ -117,8 +117,8 @@ impl Processor {
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let load_res = self.load_from_address_to_register(dst, src_address);
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let load_res = self.load_from_address_to_register(dst, src_address);
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assert_ok!(load_res);
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assert_ok!(load_res);
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}
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}
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Instruction::LD16bitImmediateToRegister { value, dst } => {
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Instruction::LD16bitImmediateToRegister { dst, value } => {
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self.registers.set_combined_register(dst, value)
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self.registers.set_16bit_register(dst, value);
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}
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}
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}
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}
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@ -517,12 +517,16 @@ mod tests {
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assert_eq!(0xAF, processor.registers.a);
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assert_eq!(0xAF, processor.registers.a);
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}
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}
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#[test_case(0x01, register::Combined::BC)]
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#[test_case(0x01, register::SixteenBit::Combined(register::Combined::BC))]
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#[test_case(0x11, register::Combined::DE)]
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#[test_case(0x11, register::SixteenBit::Combined(register::Combined::DE))]
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#[test_case(0x21, register::Combined::HL)]
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#[test_case(0x21, register::SixteenBit::Combined(register::Combined::HL))]
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fn test_load_16bit_immediate_to_regisetr(
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#[test_case(
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0x31,
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register::SixteenBit::Single(register::SingleSixteenBit::StackPointer)
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)]
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fn test_load_16bit_immediate_to_register(
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opcode: u8,
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opcode: u8,
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expected_dst_register: register::Combined,
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expected_dst_register: register::SixteenBit,
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) {
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) {
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let mut processor = Processor::default();
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let mut processor = Processor::default();
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// The manual doesn't specify this is little endian, but from what I can gather
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// The manual doesn't specify this is little endian, but from what I can gather
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@ -542,7 +546,7 @@ mod tests {
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0x1234,
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0x1234,
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processor
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processor
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.registers
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.registers
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.get_combined_register(expected_dst_register)
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.get_16bit_register(expected_dst_register)
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);
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);
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}
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}
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}
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}
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@ -82,7 +82,7 @@ pub enum Instruction {
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// 3.3.2.1
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// 3.3.2.1
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LD16bitImmediateToRegister {
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LD16bitImmediateToRegister {
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value: u16,
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value: u16,
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dst: register::Combined,
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dst: register::SixteenBit,
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},
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},
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}
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}
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@ -12,15 +12,28 @@ impl OpcodeParser for Immediate16BitLoadParser {
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let opcode = parse::get_opcode_from_data(data)?;
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let opcode = parse::get_opcode_from_data(data)?;
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match opcode {
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match opcode {
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0x01 => make_load_immediate_data(register::Combined::BC, data),
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0x01 => make_load_immediate_data(
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0x11 => make_load_immediate_data(register::Combined::DE, data),
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register::SixteenBit::Combined(register::Combined::BC),
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0x21 => make_load_immediate_data(register::Combined::HL, data),
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data,
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),
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0x11 => make_load_immediate_data(
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register::SixteenBit::Combined(register::Combined::DE),
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data,
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),
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0x21 => make_load_immediate_data(
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register::SixteenBit::Combined(register::Combined::HL),
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data,
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),
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0x31 => make_load_immediate_data(
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register::SixteenBit::Single(register::SingleSixteenBit::StackPointer),
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data,
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),
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_ => Err(Error::UnknownOpcode(opcode)),
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_ => Err(Error::UnknownOpcode(opcode)),
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}
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}
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}
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}
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}
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}
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fn make_load_immediate_data(dst: register::Combined, data: &[u8]) -> ParseResult {
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fn make_load_immediate_data(dst: register::SixteenBit, data: &[u8]) -> ParseResult {
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let opcode = parse::get_opcode_from_data(data)?;
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let opcode = parse::get_opcode_from_data(data)?;
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let args = data.get(1..=2).ok_or(Error::NotEnoughArgs(opcode))?;
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let args = data.get(1..=2).ok_or(Error::NotEnoughArgs(opcode))?;
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