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Rename 8 bit immediate load isntructions

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This commit is contained in:
Nick Krichevsky 2022-04-09 13:09:27 -04:00
parent e2365aec7e
commit 1795d652fa
3 changed files with 11 additions and 11 deletions
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2
src/run.rs
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@ -38,7 +38,7 @@ macro_rules! assert_ok {
impl Processor { impl Processor {
fn run(&mut self, instruction: &RunnableInstruction) { fn run(&mut self, instruction: &RunnableInstruction) {
match instruction.instruction { match instruction.instruction {
Instruction::LDnnn { value, register } => { Instruction::LD8BitImmediateToRegister { value, register } => {
self.registers.set_single_register(register, value); self.registers.set_single_register(register, value);
} }

2
src/run/instructions.rs
View file

@ -5,7 +5,7 @@ use super::register;
// http://marc.rawer.de/Gameboy/Docs/GBCPUman.pdf // http://marc.rawer.de/Gameboy/Docs/GBCPUman.pdf
pub enum Instruction { pub enum Instruction {
// 3.3.1.1 // 3.3.1.1
LDnnn { LD8BitImmediateToRegister {
value: u8, value: u8,
register: register::Single, register: register::Single,
}, },

18
src/run/parse/load8/immediate.rs
View file

@ -15,26 +15,26 @@ impl OpcodeParser for Immediate8BitLoadParser {
let opcode = parse::get_opcode_from_data(data)?; let opcode = parse::get_opcode_from_data(data)?;
match opcode { match opcode {
0x3E => make_ldnn_data(register::Single::A, data), 0x3E => make_load_immediate_data(register::Single::A, data),
0x06 => make_ldnn_data(register::Single::B, data), 0x06 => make_load_immediate_data(register::Single::B, data),
0x0E => make_ldnn_data(register::Single::C, data), 0x0E => make_load_immediate_data(register::Single::C, data),
0x16 => make_ldnn_data(register::Single::D, data), 0x16 => make_load_immediate_data(register::Single::D, data),
0x1E => make_ldnn_data(register::Single::E, data), 0x1E => make_load_immediate_data(register::Single::E, data),
0x26 => make_ldnn_data(register::Single::H, data), 0x26 => make_load_immediate_data(register::Single::H, data),
0x2E => make_ldnn_data(register::Single::L, data), 0x2E => make_load_immediate_data(register::Single::L, data),
_ => Err(Error::UnknownOpcode(opcode)), _ => Err(Error::UnknownOpcode(opcode)),
} }
} }
} }
fn make_ldnn_data(register: register::Single, data: &[u8]) -> ParseResult { fn make_load_immediate_data(register: register::Single, data: &[u8]) -> ParseResult {
let opcode = parse::get_opcode_from_data(data)?; let opcode = parse::get_opcode_from_data(data)?;
let value = data.get(1).ok_or(Error::NotEnoughArgs(opcode))?; let value = data.get(1).ok_or(Error::NotEnoughArgs(opcode))?;
Ok(( Ok((
RunnableInstruction { RunnableInstruction {
instruction: Instruction::LDnnn { instruction: Instruction::LD8BitImmediateToRegister {
register, register,
value: *value, value: *value,
}, },