Commit graph

129 commits

Author SHA1 Message Date
Nick Krichevsky 3803abfa1d Add support for loading 16 bit immediate values to combined registers 2022-04-09 13:35:17 -04:00
Nick Krichevsky 1795d652fa Rename 8 bit immediate load isntructions 2022-04-09 13:09:27 -04:00
Nick Krichevsky e2365aec7e Add ability to load from i/o registers relative to immediate 2022-04-08 21:10:47 -04:00
Nick Krichevsky 75235ad5e0 Refactor run.rs to reduce repetition and use proper Error types 2022-04-08 19:42:37 -04:00
Nick Krichevsky af38d1edf4 Implement load + inc/dec opcodes 2022-04-08 18:50:26 -04:00
Nick Krichevsky 9a7f1ed093 Add ability to read/write to i/o register zone 2022-04-08 17:46:54 -04:00
Nick Krichevsky 769e4bc2ab Replace panic checks with unwrap_or_else in Processor 2022-04-08 17:14:19 -04:00
Nick Krichevsky ac541822db Add Display on register traits 2022-04-08 16:38:46 -04:00
Nick Krichevsky 4e6e3f7680 Add TODO about cycles 2022-04-07 18:13:49 -04:00
Nick Krichevsky d419500279 minor style fix 2022-04-07 00:33:04 -04:00
Nick Krichevsky a7761215b5 Remove unneeded macro in transfer module
This is a lot more readable now that we can squeeze it onto one line
2022-04-07 00:32:44 -04:00
Nick Krichevsky 066189708b Move static methods for RunnableInstruction into parse package 2022-04-07 00:29:39 -04:00
Nick Krichevsky 0c53bd2c6b Break up memory parsing module 2022-04-06 23:06:03 -04:00
Nick Krichevsky ad62658980 Rustdocs 2022-04-06 22:47:38 -04:00
Nick Krichevsky 8734a7fc8e Make a macro for the transfer module 2022-04-06 22:43:38 -04:00
Nick Krichevsky e5609972c8 Move instruction parsing into its own module 2022-04-06 21:01:11 -04:00
Nick Krichevsky 6d4ffc03ef Implement loading to/from A register and fix loading from immediate address
Was pulling from the wrong data in the stream to get the address, and
the test basically was a nop
2022-04-05 22:13:39 -04:00
Nick Krichevsky c491b180fc Fix clippy lint
We kinda have to allow this to be this long, lest we ant this method to
devolve into macro hell
2022-04-05 00:24:25 -04:00
Nick Krichevsky 28132d60fa Add support for loading to A from immediate address 2022-04-05 00:22:20 -04:00
Nick Krichevsky cb535e24c3 Add loading of addresses in other combined registers than (hl) 2022-04-05 00:19:19 -04:00
Nick Krichevsky e95cd263c5 Implement load immediate to (hl) 2022-04-04 23:41:25 -04:00
Nick Krichevsky dcaf0588de Add load to (hl) instructions 2022-04-04 23:34:34 -04:00
Nick Krichevsky 1dc176fd74 Add load from (hl) instructions 2022-04-04 23:12:59 -04:00
Nick Krichevsky 4c6eec264a Add basic memory for load instruction backing 2022-04-04 22:51:56 -04:00
Nick Krichevsky af95676b15 Add parsing of ldr1r2 instructions 2022-04-04 22:18:15 -04:00
Nick Krichevsky 92b779d02d Add parsing of ldnn instructions 2022-04-02 11:01:04 -04:00
Nick Krichevsky ac6097794d Add support for combined registers 2022-04-01 19:48:13 -04:00
Nick Krichevsky 607e4ab2df Add flag register setting 2022-04-01 19:21:33 -04:00
Nick Krichevsky fc710000a4 Initial commit. Add registers 2022-04-01 18:11:09 -04:00