 Nick Krichevsky
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6dce7f0ead
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Add SUBC jsmoo tests
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2023-05-05 19:49:35 -04:00 |
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Nick Krichevsky
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6e62b632a3
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Add support for SUBC
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2023-05-05 00:09:47 -04:00 |
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Nick Krichevsky
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51b9ab45b4
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Enable jsmoo tests for SUB
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2023-05-04 23:18:13 -04:00 |
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Nick Krichevsky
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b0554a098e
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Implement basic SUB operation
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2023-05-04 23:18:13 -04:00 |
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Nick Krichevsky
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c05f8c57e9
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Add support for ADC (HL), A
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2023-05-01 00:24:52 -04:00 |
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Nick Krichevsky
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2ade899fc6
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Fix 0xF8 instruction flags
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2023-05-01 00:12:17 -04:00 |
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Nick Krichevsky
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c63aac5e35
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Add tests for 0XF8 and 0xF9 from jsmoo
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2023-05-01 00:11:43 -04:00 |
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Nick Krichevsky
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7ef858d90c
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Add ADC A,A support
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2023-04-30 21:34:46 -04:00 |
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Nick Krichevsky
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67824138b1
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Make flags field private again
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2023-04-30 21:23:11 -04:00 |
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Nick Krichevsky
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a593664e43
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Fix bug where lower 8 bits of the F register were used
This should never happen
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2023-04-30 21:13:01 -04:00 |
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Nick Krichevsky
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a8ee2bc391
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Add jsmoo stack push/pop tests
Fail for AF
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2023-04-30 21:12:42 -04:00 |
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Nick Krichevsky
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520732e841
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Merge branch 'jsmoo'
This includes the tests from the jsmoo emulator, plus the refactors that
it turned out I needed to run them
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2023-04-30 19:22:53 -04:00 |
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Nick Krichevsky
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e6b375ae7d
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Add 16 bit tests to jsmoo disabled folder
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2023-04-30 19:22:43 -04:00 |
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Nick Krichevsky
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555800dbd1
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Add jsmoo tests for all implemented instructions
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2023-04-30 19:19:02 -04:00 |
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Nick Krichevsky
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a8736052d1
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Major refactor: change memory to be based on a view, rather than some slice
This fixes a problem where we couldn't read memory in a way that wraps around, like the gameboy does.
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2023-04-30 19:10:32 -04:00 |
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Nick Krichevsky
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10b9c00f72
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Add beginnings of jsmoo tests, fails on 31 006B
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2023-04-21 16:49:37 -04:00 |
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Nick Krichevsky
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7554438c7a
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Fix bug where address 0xFFFF was not accessible
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2023-04-21 16:41:21 -04:00 |
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Nick Krichevsky
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e42303d31a
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Rename Processor::run to Processor::run_instruction
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2023-04-21 15:20:22 -04:00 |
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Nick Krichevsky
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6ac4ed5d7c
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add support for ADC with immediate
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2023-04-21 12:29:55 -04:00 |
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Nick Krichevsky
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e416e607df
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Fix bug where the zero flag wouldn't be set if the carry flag was set
I have no idea why I thought this was correct
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2023-04-21 12:25:15 -04:00 |
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Nick Krichevsky
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e369140dd1
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Fix incorrect usage of the + operator in the 16+8 bit addition routine
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2023-04-19 21:45:53 -04:00 |
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Nick Krichevsky
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34776d99f4
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Satisfy clippy
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2023-04-15 19:48:56 -04:00 |
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Nick Krichevsky
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3b6e611768
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Test cleanup
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2023-04-15 19:47:30 -04:00 |
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Nick Krichevsky
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321ab461ff
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Move all CPU tests into integration test directory
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2023-04-15 19:00:50 -04:00 |
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Nick Krichevsky
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2caf7fe7e8
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Remove non-existent F register
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2023-04-15 18:31:37 -04:00 |
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Nick Krichevsky
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040133eb82
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Add ADC instruction implementations
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2023-04-15 18:29:39 -04:00 |
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Nick Krichevsky
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16c275282e
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Fix some clippy lints
Back on the horse...
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2023-04-15 15:06:00 -04:00 |
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Nick Krichevsky
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70db1fe62a
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Reduce repetition in flags tests
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2022-04-24 00:10:18 -04:00 |
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Nick Krichevsky
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f0c0e818c9
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Implement add A to HL instruction
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2022-04-23 23:46:44 -04:00 |
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Nick Krichevsky
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733c18614c
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Add support for adding immediate to A register
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2022-04-23 22:31:22 -04:00 |
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Nick Krichevsky
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f97fbdcf9e
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Add rustdocs to arithutil
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2022-04-23 16:43:30 -04:00 |
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Nick Krichevsky
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e6b25cd54b
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Add overload to carry-add negatives
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2022-04-23 16:37:50 -04:00 |
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Nick Krichevsky
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418a659e07
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Simplify half carry checking logic
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2022-04-23 13:33:59 -04:00 |
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Nick Krichevsky
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dcf13061c6
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Add CarryingAdd trait and integrate it in existing addition locations
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2022-04-23 13:12:18 -04:00 |
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Nick Krichevsky
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807249ba18
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Use proper Error type when running instructions instead of panicking immediately
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2022-04-17 20:41:22 -04:00 |
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Nick Krichevsky
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16385f6387
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Break out instruction running code into its own module
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2022-04-16 10:59:07 -04:00 |
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Nick Krichevsky
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54cb2b8b2c
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Add (messy) implementation of adding 8 bit registers to others
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2022-04-14 23:28:29 -04:00 |
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Nick Krichevsky
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29ccffccf7
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Replace 'ld' with Load
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2022-04-14 21:30:49 -04:00 |
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Nick Krichevsky
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deeacd917a
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Simplify register access code
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2022-04-14 21:22:05 -04:00 |
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Nick Krichevsky
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f1e72b45de
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Restructure instruction enums to be categorized based on the type of instruction
This helps break up some of the long match statement in Processor::run, but construction does become a bit annoying.
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2022-04-11 23:52:44 -04:00 |
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Nick Krichevsky
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16bc8833d5
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Remove unused 'use'
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2022-04-11 23:10:26 -04:00 |
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Nick Krichevsky
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84e680fd15
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Implement stack push and pop
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2022-04-11 23:10:26 -04:00 |
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Nick Krichevsky
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cfebc1b912
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Implement (messy) LEA for stack pointer addresses
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2022-04-09 18:34:11 -04:00 |
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Nick Krichevsky
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a7adfb6f90
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Implement transfers between HL and SP
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2022-04-09 15:43:28 -04:00 |
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Nick Krichevsky
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0667a59c6a
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Fix incorrect opcode for loading load then inc, add variant for loading from memory
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2022-04-09 14:43:53 -04:00 |
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Nick Krichevsky
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30e45bee72
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Clean up load8::transfer
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2022-04-09 14:02:59 -04:00 |
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Nick Krichevsky
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034811c54e
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Implement loading to the stack pointer
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2022-04-09 14:00:33 -04:00 |
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Nick Krichevsky
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d85c7b8a98
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Add support for programatically manipulating 16 bit registers
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2022-04-09 13:57:50 -04:00 |
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Nick Krichevsky
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ef2aff5a8e
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Rename Single to SingleEightBit
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2022-04-09 13:47:26 -04:00 |
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Nick Krichevsky
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3803abfa1d
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Add support for loading 16 bit immediate values to combined registers
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2022-04-09 13:35:17 -04:00 |
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