 Nick Krichevsky
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10b9c00f72
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Add beginnings of jsmoo tests, fails on 31 006B
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2023-04-21 16:49:37 -04:00 |
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Nick Krichevsky
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7554438c7a
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Fix bug where address 0xFFFF was not accessible
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2023-04-21 16:41:21 -04:00 |
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Nick Krichevsky
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e42303d31a
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Rename Processor::run to Processor::run_instruction
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2023-04-21 15:20:22 -04:00 |
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Nick Krichevsky
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6ac4ed5d7c
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add support for ADC with immediate
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2023-04-21 12:29:55 -04:00 |
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Nick Krichevsky
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e416e607df
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Fix bug where the zero flag wouldn't be set if the carry flag was set
I have no idea why I thought this was correct
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2023-04-21 12:25:15 -04:00 |
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Nick Krichevsky
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e369140dd1
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Fix incorrect usage of the + operator in the 16+8 bit addition routine
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2023-04-19 21:45:53 -04:00 |
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Nick Krichevsky
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34776d99f4
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Satisfy clippy
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2023-04-15 19:48:56 -04:00 |
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Nick Krichevsky
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3b6e611768
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Test cleanup
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2023-04-15 19:47:30 -04:00 |
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Nick Krichevsky
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321ab461ff
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Move all CPU tests into integration test directory
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2023-04-15 19:00:50 -04:00 |
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Nick Krichevsky
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2caf7fe7e8
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Remove non-existent F register
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2023-04-15 18:31:37 -04:00 |
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Nick Krichevsky
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040133eb82
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Add ADC instruction implementations
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2023-04-15 18:29:39 -04:00 |
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Nick Krichevsky
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16c275282e
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Fix some clippy lints
Back on the horse...
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2023-04-15 15:06:00 -04:00 |
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Nick Krichevsky
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70db1fe62a
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Reduce repetition in flags tests
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2022-04-24 00:10:18 -04:00 |
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Nick Krichevsky
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f0c0e818c9
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Implement add A to HL instruction
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2022-04-23 23:46:44 -04:00 |
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Nick Krichevsky
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733c18614c
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Add support for adding immediate to A register
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2022-04-23 22:31:22 -04:00 |
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Nick Krichevsky
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f97fbdcf9e
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Add rustdocs to arithutil
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2022-04-23 16:43:30 -04:00 |
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Nick Krichevsky
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e6b25cd54b
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Add overload to carry-add negatives
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2022-04-23 16:37:50 -04:00 |
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Nick Krichevsky
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418a659e07
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Simplify half carry checking logic
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2022-04-23 13:33:59 -04:00 |
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Nick Krichevsky
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dcf13061c6
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Add CarryingAdd trait and integrate it in existing addition locations
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2022-04-23 13:12:18 -04:00 |
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Nick Krichevsky
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807249ba18
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Use proper Error type when running instructions instead of panicking immediately
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2022-04-17 20:41:22 -04:00 |
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Nick Krichevsky
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16385f6387
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Break out instruction running code into its own module
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2022-04-16 10:59:07 -04:00 |
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Nick Krichevsky
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54cb2b8b2c
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Add (messy) implementation of adding 8 bit registers to others
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2022-04-14 23:28:29 -04:00 |
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Nick Krichevsky
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29ccffccf7
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Replace 'ld' with Load
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2022-04-14 21:30:49 -04:00 |
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Nick Krichevsky
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deeacd917a
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Simplify register access code
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2022-04-14 21:22:05 -04:00 |
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Nick Krichevsky
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f1e72b45de
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Restructure instruction enums to be categorized based on the type of instruction
This helps break up some of the long match statement in Processor::run, but construction does become a bit annoying.
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2022-04-11 23:52:44 -04:00 |
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Nick Krichevsky
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16bc8833d5
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Remove unused 'use'
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2022-04-11 23:10:26 -04:00 |
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Nick Krichevsky
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84e680fd15
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Implement stack push and pop
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2022-04-11 23:10:26 -04:00 |
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Nick Krichevsky
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cfebc1b912
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Implement (messy) LEA for stack pointer addresses
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2022-04-09 18:34:11 -04:00 |
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Nick Krichevsky
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a7adfb6f90
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Implement transfers between HL and SP
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2022-04-09 15:43:28 -04:00 |
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Nick Krichevsky
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0667a59c6a
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Fix incorrect opcode for loading load then inc, add variant for loading from memory
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2022-04-09 14:43:53 -04:00 |
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Nick Krichevsky
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30e45bee72
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Clean up load8::transfer
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2022-04-09 14:02:59 -04:00 |
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Nick Krichevsky
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034811c54e
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Implement loading to the stack pointer
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2022-04-09 14:00:33 -04:00 |
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Nick Krichevsky
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d85c7b8a98
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Add support for programatically manipulating 16 bit registers
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2022-04-09 13:57:50 -04:00 |
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Nick Krichevsky
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ef2aff5a8e
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Rename Single to SingleEightBit
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2022-04-09 13:47:26 -04:00 |
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Nick Krichevsky
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3803abfa1d
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Add support for loading 16 bit immediate values to combined registers
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2022-04-09 13:35:17 -04:00 |
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Nick Krichevsky
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1795d652fa
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Rename 8 bit immediate load isntructions
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2022-04-09 13:09:27 -04:00 |
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Nick Krichevsky
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e2365aec7e
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Add ability to load from i/o registers relative to immediate
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2022-04-08 21:10:47 -04:00 |
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Nick Krichevsky
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75235ad5e0
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Refactor run.rs to reduce repetition and use proper Error types
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2022-04-08 19:42:37 -04:00 |
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Nick Krichevsky
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af38d1edf4
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Implement load + inc/dec opcodes
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2022-04-08 18:50:26 -04:00 |
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Nick Krichevsky
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9a7f1ed093
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Add ability to read/write to i/o register zone
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2022-04-08 17:46:54 -04:00 |
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Nick Krichevsky
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769e4bc2ab
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Replace panic checks with unwrap_or_else in Processor
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2022-04-08 17:14:19 -04:00 |
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Nick Krichevsky
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ac541822db
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Add Display on register traits
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2022-04-08 16:38:46 -04:00 |
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Nick Krichevsky
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4e6e3f7680
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Add TODO about cycles
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2022-04-07 18:13:49 -04:00 |
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Nick Krichevsky
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d419500279
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minor style fix
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2022-04-07 00:33:04 -04:00 |
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Nick Krichevsky
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a7761215b5
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Remove unneeded macro in transfer module
This is a lot more readable now that we can squeeze it onto one line
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2022-04-07 00:32:44 -04:00 |
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Nick Krichevsky
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066189708b
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Move static methods for RunnableInstruction into parse package
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2022-04-07 00:29:39 -04:00 |
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Nick Krichevsky
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0c53bd2c6b
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Break up memory parsing module
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2022-04-06 23:06:03 -04:00 |
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Nick Krichevsky
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ad62658980
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Rustdocs
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2022-04-06 22:47:38 -04:00 |
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Nick Krichevsky
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8734a7fc8e
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Make a macro for the transfer module
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2022-04-06 22:43:38 -04:00 |
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Nick Krichevsky
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e5609972c8
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Move instruction parsing into its own module
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2022-04-06 21:01:11 -04:00 |